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  fast dmos fet switches n-channel enhancement-mode sst211 / sst213 / sst215 features high speed switching. . . . . . . . . . . . . . . . . . . . t d(on) 1ns low capacitance . . . . . . . . . . . . . . . . . . . . . 2.4pf typical low on resistance . . . . . . . . . . . . . . . . . . . . 50 w typycal high gain surface mount package applications ultra high speed analog switching sample and hold multiplexers high gain amplifiers description designed for audio, video and high frequency applications, the sst211 series is a high speed, ultra low capacitance spst analog switch. utilizing calogics proprietary dmos processing the sst211 series features an integrated zener diode designed to protect the gate from electrical over stress. ordering information part package temperature range sst211 sot-143 surface mount -55 o c to +125 o c sst213 sot-143 surface mount -55 o c to +125 o c sst215 sot-143 surface mount -55 o c to +125 o c xsst211 sorted chips in carriers -55 o c to +125 o c XSST213 sorted chips in carriers -55 o c to +125 o c xsst215 sorted chips in carriers -55 o c to +125 o c llc pin configuration schematic diagram 3 2 4 1 gate (3) drain (2) body (4) source (1) cd1-1 product marking sst211 211 sst213 213 sst215 215
sst211 / sst213 / sst215 llc absolute maximum ratings (t c = +25 o c unless otherwise noted) parameter breakdown voltages sst211 sst213 sst215 unit v ds +30 +10 +20 v v sd +10 +10 +20 v v db +30 +15 +25 v v sb +15 +15 +25 v v gs -15 -15 -25 v +25 +25 +30 v v gb -0.3 -0.3 -0.3 v +25 +25 +30 v v gd -30 -15 -25 v +25 +25 +30 v i d continous drain current . . . . . . . . . . . . . . . . . . . . . 50ma t j operating junction temperature range . . -55 to +125 o c p t power dissipation (at or below tc = +25 o c) . . . . 360mw t s storage temperature range . . . . . . . . . . . -55 to +150 o c linear derating factor3.6mw/ o electrical characteristics (t c = +25 o c unless otherwise noted) symbol characteristics sst211 sst213 sst215 unit test conditions min typ max min typ max min typ max static b vds drain-source breakdown voltage 30 35 v i d = 10 m a, v gs = v bs = 0 10 25 10 25 20 25 i d = 10na, v gs = v bs = -5v b vsd source-drain breakdown voltage 10 10 20 i s = 10na, v gd = v bd = -5v b vdb drain-body breakdown voltage 15 15 25 i d = 10na, v gb = 0 source open b vsb source-body breakdown voltage 15 15 25 i s = 10 m a, v gb = 0 drain open i d(off) drain-source off current 0.2 10 0.2 10 na v ds = 10v v gs = v bs = -5v 0.2 10 v ds = 20v i s(off) source-drain off current 0.6 10 0.6 10 v sd = 10v v gd = v bd = -5v 0.6 10 v sd = 20v i gbs gate-body leakage current 10 10 m a v gb = 25v v db = v sb = 0 10 v gb = 30v v gs(th) gate threshold voltage 0.5 1.0 2.0 0.1 2.0 0.1 1.0 2.0 v v ds = v gs , i d = 1 m a, v sb = 0 r ds(on) drain-source 1 on resistance 50 70 50 70 50 70 ohms v gs = 5v i d = 1ma v sb = 0 30 45 30 45 30 45 v gs = 10v dynamic g fs common-source 1 foward transcond. 10 12 10 12 10 12 ms v ds = 10v, i d = 20ma f = 1khz, v sb = 0 c (gs + gd + gb) gate node capacitance 2.4 3.5 2.4 3.5 2.4 3.5 pf v ds = 10v v gs = v bs = -15v f = 1mhz c (gd + db) drain node capacitance 1.3 1.5 1.3 1.5 1.3 1.5 c (gs + sb) source node capacitance 3.5 4.0 3.5 4.0 3.5 4.0 c (dg) reverse transfer capacitance 0.3 0.5 0.3 0.5 0.3 0.5 t d(on) turn on delay time 0.7 1.0 0.7 1.0 0.7 1.0 ns v dd = 5v, v g(on) = 10v r l = 680, r g = 51 t r rise time 0.8 1.0 0.8 1.0 0.8 1.0 t (off) turn off time 10 10 10 note 1: pulse test, 80 sec, 1% duty cycle typical performance characteristics: see sd211-215 series


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